Title :
Measurement techniques for coupling characterisation inside CMOS integrated circuits
Author :
Fourniols, J.-Y. ; Sicard, E. ; Garres, C.
Author_Institution :
Nat. Inst. of Appl. Sci., Toulouse, France
Abstract :
In this paper, techniques for crosstalk coupling modelling, simulation and measurement are proposed. A coupling model including capacitance and substrate effects is used for SPICE simulations for a given pair of inverters with varying size ratios and substrate resistivities. A technique is proposed for the measurement of the crosstalk noise based on RS latch sensors. An experimental implementation of the sensors in a 1.0 μm CMOS technology is presented and the crosstalk measurements are compared to the simulation predictions. The results show high crosstalk noise close from the commutation point of the logic. Forecasts concerning submicron technologies are presented together with new sensor implementations
Keywords :
CMOS integrated circuits; CMOS logic circuits; SPICE; circuit analysis computing; crosstalk; electric noise measurement; electromagnetic compatibility; logic devices; logic gates; 1.0 micron; CMOS integrated circuits; CMOS technology; EMC; RS latch sensors; SPICE simulations; capacitance effects; coupling characterisation; coupling model; crosstalk coupling modelling; crosstalk measurement; crosstalk noise; crosstalk simulation; inverters; logic; measurement techniques; size ratios; submicron technologies; substrate effects; substrate resistivities; CMOS technology; Capacitance; Conductivity; Crosstalk; Inverters; Measurement techniques; Noise measurement; Predictive models; SPICE; Semiconductor device modeling;
Conference_Titel :
Electromagnetic Compatibility, 1994. Symposium Record. Compatibility in the Loop., IEEE International Symposium on
Conference_Location :
Chicago, IL
Print_ISBN :
0-7803-1398-4
DOI :
10.1109/ISEMC.1994.385655
