DocumentCode
2556477
Title
Optical configuration of an 11,424 gate-count dynamic optically reconfigurable gate array using a VCSEL
Author
Seto, Daisaku ; Watanabe, Minoru
Author_Institution
Electr. & Electron. Eng., Shizuoka Univ., Hamamatsu
fYear
2008
fDate
4-4 Dec. 2008
Firstpage
95
Lastpage
99
Abstract
Recently, to realize large real-time systems, demands for fast computation on large VLSI have continued to increase. An optically reconfigurable gate array has been developed to realize large virtual gates. As part of that research effort, the world´s largest 11,424 gate-count dynamic optically reconfigurable gate array VLSI chip, which is based on a concept using junction capacitance of photodiodes as configuration memory, has been fabricated. The size and process of the VLSI chip are, respectively, a 96.04 mm2 and a 0.35 mum-3 metal CMOS process technology. To clarify the availability of the VLSI, this paper presents an experimental result of a long retention time of its photodiode memory architecture.
Keywords
VLSI; logic arrays; photodiodes; surface emitting lasers; 11,424 gate-count; CMOS process technology; VCSEL; VLSI; gate-count dynamic optically reconfigurable gate array; large real-time systems; photodiodes; Circuits; Dynamic programming; Field programmable gate arrays; High speed optical techniques; Holographic optical components; Holography; Optical arrays; Photodiodes; Vertical cavity surface emitting lasers; Very large scale integration; CPLDs; FPGAs; ORGAs;
fLanguage
English
Publisher
ieee
Conference_Titel
System Integration, 2008 IEEE/SICE International Symposium on
Conference_Location
Nagoya
Print_ISBN
978-1-4244-3838-9
Electronic_ISBN
978-1-4244-2209-8
Type
conf
DOI
10.1109/SI.2008.4770433
Filename
4770433
Link To Document