• DocumentCode
    2556569
  • Title

    Multistandard-compliant receiver architecture with low-voltage implementation

  • Author

    Mak, Pui-In ; U, Seng-Pan ; Martins, R.P.

  • Author_Institution
    FST, University of Macau, Macao, China
  • Volume
    2
  • fYear
    2005
  • fDate
    28-28 July 2005
  • Firstpage
    27
  • Lastpage
    30
  • Abstract
    Multistandard-compliant wireless transceivers with low-voltage low-power implementation are in great demand to match the proliferation of multiple WLANs and the continuous scaling of CMOS technologies. This paper proposes both the architecture and the corresponding circuit techniques to implement a low-IF/zero-IF reconfigurable receiver IF-to-baseband chip for IEEE 802.11a/b/g WLAN. Optimum low-voltage circuit techniques enabled a successful operation at 1 V in 0.35-μm CMOS.
  • Keywords
    Bandwidth; CMOS technology; Circuits; Filtering; Filters; Frequency synthesizers; Noise cancellation; Physical layer; Wideband; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Research in Microelectronics and Electronics, 2005 PhD
  • Conference_Location
    Lausanne, Switzerland
  • Print_ISBN
    0-7803-9345-7
  • Type

    conf

  • DOI
    10.1109/RME.2005.1542928
  • Filename
    1542928