Demonstration of latency reduction in electrical interconnections using optical fanout

Author

Pappu, Anand M. ; Apsel, Alyssa B.

Author_Institution

Sch. of Electr. & Comput. Eng., Cornell Univ., Ithaca, NY

fYear

2006

fDate

21-24 May 2006

Abstract

We present a hybrid opto-electronic system capable of improving the performance of on-chip electrical fanout architectures. Our opto-electronic system employs a layer of optical fanout and utilizes the electrical isolation between the receiving nodes. Through our proof-of-concept links, we show a 15% latency reduction for links as short as 200mum and 50% reduction at 2mm

Keywords

integrated circuit interconnections; integrated optoelectronics; optical interconnections; electrical interconnections; electrical isolation; on-chip electrical fanout architectures; optical fanout; opto-electronic system; Capacitance; Computer architecture; Delay; Energy consumption; Integrated circuit interconnections; Inverters; Optical devices; Optical interconnections; Optical receivers; Signal analysis;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2006. ISCAS 2006. Proceedings. 2006 IEEE International Symposium on

Conference_Location

Island of Kos

Print_ISBN

0-7803-9389-9

Type

conf

DOI

10.1109/ISCAS.2006.1693872

Filename

1693872

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2556606