A Low Phase Noise and Wide-Bandwidth BiCMOS SiGe:C 0.25μm Digital Frequency Divider For An On-Chip Phase-Noise Measurement Circuit

Author

Godet, S. ; Tournier, É ; Llopis, O. ; Cathelin, A. ; Juyon, J.

Author_Institution

LAAS-CNRS, Univ. de Toulouse, Toulouse

fYear

2009

fDate

19-21 Jan. 2009

Firstpage

1

Lastpage

4

Abstract

A low phase noise and wide-bandwidth frequency divider has been developed in a 0.25 mum SiGe:C process. This paper discusses the BiCMOS design improvements used for ultra low phase noise applications like on-chip phase-noise measurement circuit. From a single-ended signal provided by a local oscillator LO, the wide- bandwidth frequency divider circuit generates accurate quadrature signals. For the full 1 kHz-5.5 GHz input frequency range, the frequency divider achieves an output quadrature error less than plusmn1deg. This paper presents a novel architecture designed for improving phase noise and exhibits a measured residual phase noise of -164 dBc/Hz @ 100 kHz with a 3.5 GHz input frequency.

Keywords

BiCMOS digital integrated circuits; Ge-Si alloys; carbon; flip-flops; frequency dividers; BiCMOS; SiGe:C; digital frequency divider; local oscillator; on-chip phase-noise measurement; quadrature signal; size 0.25 mum; BiCMOS integrated circuits; Circuit testing; Frequency conversion; Frequency measurement; Noise measurement; Phase measurement; Phase noise; Radio frequency; Signal generators; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 2009. SiRF '09. IEEE Topical Meeting on

Conference_Location

San Diego, CA

Print_ISBN

978-1-4244-3940-9

Electronic_ISBN

978-1-4244-2831-1

Type

conf

DOI

10.1109/SMIC.2009.4770490

Filename

4770490