• DocumentCode
    2556977
  • Title

    Characterizing electron shower with CHARM(R)-2 wafers on Eaton NV-8200P medium current ion implanter

  • Author

    Reno, Steve ; Gonzalez, Henry ; Messick, Cleston ; Lukaszek, Wes ; Angelo, David A St ; Becker, Klaus ; Rogers, Bobby ; Romanski, Thomas

  • Author_Institution
    Fairchild Semicond., West Jordan, UT, USA
  • fYear
    1998
  • fDate
    12-15 Oct 1998
  • Firstpage
    86
  • Lastpage
    89
  • Abstract
    Avoiding gate oxide damage due to excessive wafer charging has always been an issue with high current implanters. On the other hand, whether it is caused by shrinking of device dimensions, or its use as a backup for high current applications, charging level awareness becomes the primary limiting factor for running higher beam currents in medium current implanters. Often a cautious approach results in lower machine throughput. To the present, flooding the wafer with low energy electrons from electron showers (E-Shower) has been the widely accepted means of reducing wafer charging. The effectiveness of the E-shower in reducing charging as a function of primary ion current has been investigated in Eaton´s medium current ion implanter. Extensive testing included over 180 bare and photoresist coated CHARM(R)-2 charge monitors. Optimum shower settings will be presented and discussed in the light of CHARM-2 results and product split lot yields
  • Keywords
    electron beam effects; integrated circuit reliability; integrated circuit testing; integrated circuit yield; ion implantation; photoresists; surface charging; CHARM-2 wafers; Eaton NV-8200P medium current ion implanter; charging level awareness; electron shower; gate oxide damage; high current implanters; low energy electrons; machine throughput; optimum shower settings; photoresist coated CHARM-2 charge monitors; primary ion current; product split lot yields; testing; wafer charging; Area measurement; Current measurement; Electron beams; Electron emission; Energy measurement; Oscilloscopes; Power supplies; Surface charging; Testing; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report, 1998. IEEE International
  • Conference_Location
    Lake Tahoe, CA
  • Print_ISBN
    0-7803-4881-8
  • Type

    conf

  • DOI
    10.1109/IRWS.1998.745374
  • Filename
    745374