Floorplanning for 2.5-D system integration using multi-layer-BSG structure

2.5-D integration is a promising technique to significantly reduce the interconnection delay and thus bring advancement to VLSI technology. New CAD tools and approaches are desired by 2.5-D IC circuit design. This paper designed a novel representation multi-layer-BSG and proposed an effective algorithm based on this structure. Quick strategy for solution evaluation and phrase-based strategy for simulated annealing engine are used to reduce the runtime complexity and to improve the performance. Compared with other representations, our algorithm are experimentally proved to be a better choice for 2.5-D floorplanning problem