DocumentCode :
2557441
Title :
A scalable highly parallel VLSI architecture dedicated to associative computing algorithms
Author :
Layer, Christophe ; Pfleiderer, Hans-Jörg
Volume :
2
fYear :
2005
fDate :
25-28 July 2005
Firstpage :
214
Lastpage :
217
Keywords :
Bandwidth; Computer architecture; Concurrent computing; Data structures; Databases; Hardware; Merging; Sorting; Throughput; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Research in Microelectronics and Electronics, 2005 PhD
Print_ISBN :
0-7803-9345-7
Type :
conf
DOI :
10.1109/RME.2005.1542976
Filename :
1542976
Link To Document :
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