Accurate RF-MOSFET Back-End Parasitic De-Embedding Based on Cold Bias Technique

Author

Andrei, C.

Author_Institution

NXP Semicond., Caen

fYear

2009

fDate

19-21 Jan. 2009

Firstpage

1

Lastpage

4

Abstract

In this paper, a de-embedding procedure is proposed to accurately extract the small signal equivalent circuit of advanced MOSFETs up to 110 GHz. This efficient procedure is easy to implement using one "open" and one "short" dummy structure, and the characteristics of the p and n type MOSFET structures under measurement biased in cold state. The de-embedding of external parasitics (probe pads, and top-down metallic interconnections and via holes) futures an important decrease of the measurement time and of the silicon occupation area, and is in particular suitable for industrial test. The method has been validated in the case of 40 nm n-p-MOSFETs and is proved to be efficient up to 110 GHz.

Keywords

MOSFET; integrated circuit interconnections; microwave field effect transistors; RF MOSFET; back-end parasitic de-embedding; cold bias; external parasitics; metallic interconnections; probe pads; size 40 nm; small signal equivalent circuit; via holes; Area measurement; Equivalent circuits; Integrated circuit interconnections; MOSFETs; Metals industry; Particle measurements; Probes; Silicon; Testing; Time measurement;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 2009. SiRF '09. IEEE Topical Meeting on

Conference_Location

San Diego, CA

Print_ISBN

978-1-4244-3940-9

Electronic_ISBN

978-1-4244-2831-1

Type

conf

DOI

10.1109/SMIC.2009.4770532

Filename

4770532