• DocumentCode
    2558597
  • Title

    Optimizing Galois Field Arithmetic for Diverse Processor Architectures and Applications

  • Author

    Greenan, Kevin M. ; Miller, Ethan L. ; Schwarz, T.J.E.

  • Author_Institution
    Univ. of California, Santa Cruz, CA
  • fYear
    2008
  • fDate
    8-10 Sept. 2008
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Galois field implementations are central to the design of many reliable and secure systems, with many systems implementing them in software. The two most common Galois field operations are addition and multiplication; typically, multiplication is far more expensive than addition. In software, multiplication is generally done with a look-up to a pre-computed table, limiting the size of the field and resulting in uneven performance across architectures and applications. In this paper, we first anaylze existing table-based implementation and optimization techniques for multiplication in fields of the form GF(21). Next, we propose the use of techniques in composite fields: extensions of GF(21) in which multiplications are performed in GF(21) and efficiently combined. The composite field technique trades computation for storage space, which prevents eviction of look-up tables from the CPU cache and allows for arbitrarily large fields. Most Galois field optimizations are specific to a particular implementation; our technique is general and may be applied in any scenario requiring Galois fields. A detailed performance study across five architectures shows that the relative performance of each approach varies with architecture, and that CPU, memory limitations and fields size must be considered when selecting an appropriate Galois field implementation. We also find that the use of our composite field implementation is often faster and less memory intensive than traditional algorithms for GF(21).
  • Keywords
    Galois fields; cache storage; circuit optimisation; digital arithmetic; logic design; microprocessor chips; multiplying circuits; table lookup; Galois field arithmetic optimization; cache storage; composite field technique; diverse processor architecture; look-up table; multiplication operation; Application software; Arithmetic; Computer applications; Computer architecture; Cryptography; Design optimization; Galois fields; NIST; Pervasive computing; Software performance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Modeling, Analysis and Simulation of Computers and Telecommunication Systems, 2008. MASCOTS 2008. IEEE International Symposium on
  • Conference_Location
    Baltimore, MD
  • ISSN
    1526-7539
  • Print_ISBN
    978-1-4244-2817-5
  • Electronic_ISBN
    1526-7539
  • Type

    conf

  • DOI
    10.1109/MASCOT.2008.4770564
  • Filename
    4770564