• DocumentCode
    2559226
  • Title

    A 0.8V 57GHz-to-72GHz differential-input frequency divider with locking range optimization in 0.13μm CMOS

  • Author

    Rong, Sujiang ; Luong, Howard C.

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
  • fYear
    2010
  • fDate
    8-10 Nov. 2010
  • Firstpage
    1
  • Lastpage
    4
  • Abstract
    A current-bleeding technique is presented to enhance and maximize the locking range of a differential-input Miller divider (MD) without extra inductor and extra power. The maximum locking range and the associated optimal bleeding current to achieve minimum required output amplitude are derived. Implemented in a 0.13μm CMOS technology and with 0dBm input power, the divider prototype measures a locking range of 23.2% from 56.7GHz to 71.6GHz, which is enhanced more than 5 times compared to that of the conventional MD, while consuming the same power of 5mW at 0.8V supply.
  • Keywords
    CMOS integrated circuits; frequency dividers; current-bleeding technique; differential-input Miller divider; differential-input frequency divider; frequency 57 GHz to 72 GHz; locking range optimization; size 0.13 mum; voltage 0.8 V; Adaptation model; CMOS integrated circuits; Current measurement; Frequency conversion; Hemorrhaging; Power demand; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian
  • Conference_Location
    Beijing
  • Print_ISBN
    978-1-4244-8300-6
  • Type

    conf

  • DOI
    10.1109/ASSCC.2010.5716564
  • Filename
    5716564