DocumentCode
2559308
Title
Logic synthesis FPGA — Covering problems with Walsh spectral representation
Author
Nhan, Nguyen Huu Khanh ; Malinichev, D.M.
Author_Institution
Dept. of Electr.-Electron., Ton Duc Thang Univ., Ho Chi Minh City, Vietnam
fYear
2011
fDate
20-21 Oct. 2011
Firstpage
28
Lastpage
33
Abstract
The objective of multi-level logic synthesis of FPGA is to find the “best” multi-level structure, where “best” in this case means an equivalent presentation that is optimal with respect to various parameters such as size, speed or power consumption... Five basic operations are used in order to reach this goal: decomposition, extraction, factoring, substitution and collapsing. In this paper we propose a novel application of Walsh spectral transformation to the evaluation of Boolean function autocorrelation. In particular, we present an algorithm with approach to solve the problems of covering based on the use of Walsh spectral presentation. The methods, operations in the transform domain has appeared to be more advantageous than traditional approaches, using operations in the Boolean domain, concerning both memory occupation and execution time on some classes of functions.
Keywords
Boolean functions; field programmable gate arrays; logic design; Boolean function autocorrelation; Walsh spectral representation; execution time; logic synthesis FPGA; memory occupation; multilevel logic synthesis; multilevel structure; transform domain; Boolean functions; Complexity theory; Computer architecture; Correlation; Field programmable gate arrays; Telecommunications; Transforms; Boolean function; Walsh spectral; autocorrelation function; decomposition; logic synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Telecommunication Systems, Services, and Applications (TSSA), 2011 6th International Conference on
Conference_Location
Bali
Print_ISBN
978-1-4577-1441-2
Type
conf
DOI
10.1109/TSSA.2011.6095401
Filename
6095401
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