Title :
A 12-bit 800-MS/s switched-capacitor DAC with open-loop output driver and digital predistortion
Author :
Daigle, Clayton ; Dastgheib, Alireza ; Murmann, Boris
Author_Institution :
Dept. of Electr. Eng., Stanford Univ., Stanford, CA, USA
Abstract :
A 12-bit 800-MS/s DAC implemented in 90-nm CMOS is presented. The design uses three interleaved, pipelined, switched-capacitor cores followed by an open-loop output driver. The driver is linearized using digital predistortion. Measured SFDR is greater than 58 dB for signal frequencies below 200 MHz, and greater than 53 dB for signal frequencies below 400 MHz, all with output swings as large as 2.9 V, peak-to-peak differential. Power dissipation is 103 mW when delivering a full-scale signal current of 16 mA.
Keywords :
digital-analogue conversion; driver circuits; switched capacitor networks; CMOS process; SFDR; current 16 mA; digital predistortion; digital-analog converters; open-loop output driver; power 103 mW; size 90 nm; switched-capacitor DAC; voltage 2.9 V; word length 12 bit; Bandwidth; CMOS integrated circuits; Calibration; Driver circuits; Predistortion; Switches; Timing;
Conference_Titel :
Solid State Circuits Conference (A-SSCC), 2010 IEEE Asian
Conference_Location :
Beijing
Print_ISBN :
978-1-4244-8300-6
DOI :
10.1109/ASSCC.2010.5716580
