Title :
Hydroxy-phenyl Zn(II) porphyrin self-assembled monolayer as a diffusion barrier for copper-low k interconnect technology
Author :
Roy, Urmimala ; Khaderbad, Mrunal A. ; Yedukondalu, M. ; Walawalkar, Mrinalini G. ; Ravikanth, M. ; Mukherji, S. ; Rao, V. Ramgopal
Author_Institution :
Centre for Excellence in Nanoelectron., IIT Bombay, Mumbai, India
Abstract :
In this paper, we have studied the application of metallated porphyrin self-assembled monolayer (SAM) as a copper diffusion barrier for low-k inter-metal dielectric (IMD) CMOS technologies. SAM formed on hydrogen silesquioxane (HSQ), which is a low-k dielectric, has been demonstrated to be effective in preventing diffusion of copper ions into the porous dielectric. This has been shown by fabricating Cu-HSQ-Si and Cu-SAM-HSQ-Si metal-insulator-semiconductor test structures. Bias-temperature stress (BTS) studies have been done to investigate the effectiveness of SAM as a diffusion barrier. Formation of SAM on HSQ has been characterized using Fourier Transform Infra-red Spectroscopy studies. Thermogravimetric analysis (TGA) of hydroxyl-phenyl Zn(II) porphyrin has been used to verify thermal stability of the molecule under back-end-of-line (BEOL) process conditions.
Keywords :
CMOS integrated circuits; integrated circuit interconnections; metallisation; Cu-HSQ-Si metal-insulator-semiconductor test structure; Cu-SAM-HSQ-Si metal-insulator-semiconductor test structure; Fourier transform infrared spectroscopy; IMD CMOS technology; back-end-of-line process; bias-temperature stress; copper diffusion barrier; copper-low k interconnect technology; hydrogen silesquioxane; hydroxy-phenyl Zn(II) porphyrin self-assembled monolayer; hydroxyl-phenyl Zn(II) porphyrin; low-k dielectric; low-k intermetal dielectric; metallated porphyrin self-assembled monolayer; porous dielectric; thermal stability; thermogravimetric analysis; CMOS technology; Copper; Dielectrics; Fourier transforms; Hydrogen; Infrared spectra; Metal-insulator structures; Spectroscopy; Testing; Thermal stresses; Bias-temperature stress; diffusion barrier; interconnect; low-k dielectric; self-assembled monolayer;
Conference_Titel :
Electron Devices and Semiconductor Technology, 2009. IEDST '09. 2nd International Workshop on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4244-3831-0
Electronic_ISBN :
978-1-4244-3832-7
DOI :
10.1109/EDST.2009.5166131
