DocumentCode :
2560719
Title :
A high density datapath compiler mixing random logic with optimized blocks
Author :
Ammar, L.B. ; Greiner, A.
Author_Institution :
Lab. MASI CA
fYear :
1993
fDate :
22-25 Feb 1993
Firstpage :
194
Lastpage :
198
Abstract :
A datapath compiler providing high transistor density is described. A designer can mix random logic with optimized blocks in the same bit-sliced structure thanks to a dedicated datapath library. Automatic placement is performed according to the structural input description. Minimized cost functions are total wire length and track density. Track assignment, dealing with virtual terminals, uses a divide and conquer approach to perform efficient over-cell routing. In order to provide process-independence, a symbolic layout approach is used. This tool has been successfully used to design several high performance datapaths
Keywords :
cellular arrays; circuit layout CAD; circuit optimisation; divide and conquer methods; integrated circuit layout; logic CAD; automatic placement; bit-sliced structure; datapath compiler; dedicated datapath library; divide and conquer approach; efficient over-cell routing; high performance datapaths; high transistor density; optimized blocks; random logic; symbolic layout approach; total wire length; track assignment; track density; virtual terminals; Automatic control; Circuit synthesis; Cost function; Libraries; Logic; Optimizing compilers; Productivity; Routing; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Conference_Location :
Paris
Print_ISBN :
0-8186-3410-3
Type :
conf
DOI :
10.1109/EDAC.1993.386477
Filename :
386477
Link To Document :
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