A Linear Mode CMOS Power Amplifier with Self-Linearizing Bias

Author

Singh, Rimal Deep ; Yu, Kyung-Wan

Author_Institution

Skyworks Solutions Inc., Irvine

fYear

2006

fDate

13-15 Nov. 2006

Firstpage

251

Lastpage

254

Abstract

A biasing scheme that improves the linearity of linear mode power amplifiers (PA) is presented. This technique employs adding feedback to a current mirror bias to enhance the linearity of the amplifier by compensating the nonlinear input capacitance of the core transistor. The technique is verified with simulations and implemented in a prototype 2.4 GHz PA for WLAN application. The PA is fabricated in a 0.35-mum CMOS and achieves a small-signal gain of 25.4 dB, output P1dB of 25.1 dBm, and a power-added efficiency (PAE) of 40%.

Keywords

CMOS analogue integrated circuits; UHF power amplifiers; circuit feedback; current mirrors; wireless LAN; WLAN; circuit feedback; current mirror; efficiency 40 percent; frequency 2.4 GHz; gain 25.4 dB; linear mode CMOS power amplifier; self-linearizing bias; size 0.35 mum; CMOS technology; Equations; Feedback circuits; Linearity; Mirrors; Parasitic capacitance; Power amplifiers; Predistortion; Radio frequency; Wireless LAN; CMOS; Class AB power amplifier; WLAN; current mirror; linearity; nonlinear capacitance;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian

Conference_Location

Hangzhou

Print_ISBN

0-7803-9734-7

Electronic_ISBN

0-7803-97375-5

Type

conf

DOI

10.1109/ASSCC.2006.357898

Filename

4197637