DocumentCode :
2560885
Title :
Adding hardware for testability in synthesized data paths
Author :
Steensma, Johannes ; Catthoor, Francky ; De Man, Hugo
Author_Institution :
IMEC Lab., Leuven, Belgium
fYear :
1993
fDate :
22-25 Feb 1993
Firstpage :
156
Lastpage :
160
Abstract :
A technique for automatically adding hardware for testability is proposed. The technique is closely integrated with a symbolic test method which can deal with realistic data paths. The symbolic test technique is based on novel controllability and observability descriptions. These descriptions are also used for the testability analysis. In case of testability problems, various ways to add hardware are considered and an algorithm which finds the optimal set of hardware solutions is given
Keywords :
controllability; design for testability; high level synthesis; logic testing; observability; algorithm; automatically adding hardware; controllability; design for testability; hardware solutions; high level synthesis; observability; optimal set; symbolic test method; synthesized data paths; testability analysis; Automatic testing; Controllability; Costs; Data processing; Hardware; Laboratories; Logic testing; Signal processing; Test pattern generators; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Conference_Location :
Paris
Print_ISBN :
0-8186-3410-3
Type :
conf
DOI :
10.1109/EDAC.1993.386483
Filename :
386483
Link To Document :
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