DocumentCode :
2561327
Title :
AMICAL: An interactive high level synthesis environment
Author :
Jerraya, A.A. ; Park, I. ; O´Brien, K.
Author_Institution :
Syst. Level Synthesis Group, Institute Nat. Polytech, de Grenable, France
fYear :
1993
fDate :
22-25 Feb 1993
Firstpage :
58
Lastpage :
62
Abstract :
The AMICAL architectural synthesis system starts with a behavioral specification given in VHDL, performs both scheduling and allocation, and generates a structural description that may feed existing silicon compilers acting at the logic and RT levels. All the synthesis algorithms are implemented as part of an interactive synthesis environment, where automatic and manual design may be mixed. Experiments have shown that the use of AMICAL leads to the best known solutions for most benchmarks. These solutions may be obtained by mixing automatic and manual design or by the use of an automatic exploration of the design space. The response time of AMICAL is reasonably short making it a genuine interactive system
Keywords :
circuit layout CAD; hardware description languages; high level synthesis; scheduling; AMICAL; VHDL; allocation; architectural synthesis system; automatic design; automatic exploration; behavioral specification; design space; interactive high level synthesis environment; manual design; scheduling; short responce time; silicon compilers; Algorithm design and analysis; Automatic control; Delay; Feeds; High level synthesis; Job shop scheduling; Libraries; Logic; Packaging; Silicon compiler;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation, 1993, with the European Event in ASIC Design. Proceedings. [4th] European Conference on
Conference_Location :
Paris
Print_ISBN :
0-8186-3410-3
Type :
conf
DOI :
10.1109/EDAC.1993.386500
Filename :
386500
Link To Document :
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