Title :
A 14-Gb/s 4-PAM Adaptive Analog Equalizer for 40-inch Backplane Interconnections
Author :
Chen, Qui-Ting ; Huang, Yen-Chuan ; Lee, Tai-Cheng
Author_Institution :
Nat. Taiwan Univ., Taipei
Abstract :
Limitations of frequency response in backplane interconnections impede high-speed data transmission beyond Gbps. A 14-Gb/s 4-PAM adaptive analog equalizer is proposed to compensate the 40-inch backplane interconnections by using a sum-feedback filter (SFF), relaxing the design requirement of the conventional analog feed-forward equalizers (FFE). 4-level pulse amplitude modulation (PAM) is also adopted to increase the transmission data rate over bandwidth-limited channel. The 4-PAM adaptive equalizer has been fabricated in a 0.18-mum CMOS technology, while dissipating 121 mW from a single 1.8-V power supply.
Keywords :
CMOS analogue integrated circuits; adaptive equalisers; feedforward; filters; frequency response; pulse amplitude modulation; CMOS technology; adaptive analog feed-forward equalizers; backplane interconnections; bit rate 14 Gbit/s; data transmission; frequency response; power 121 mW; pulse amplitude modulation; size 0.18 mum; size 40 inch; sum-feedback filter; voltage 1.8 V; Adaptive filters; Backplanes; CMOS technology; Data communication; Equalizers; Feedforward systems; Frequency response; Impedance; Pulse modulation; Pulsed power supplies;
Conference_Titel :
Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian
Conference_Location :
Hangzhou
Print_ISBN :
0-7803-9734-7
Electronic_ISBN :
0-7803-97375-5
DOI :
10.1109/ASSCC.2006.357935
