DocumentCode
2561916
Title
Advanced technologies for enhancing drive current of high-density transistors
Author
Fukutome, Hidenobu ; Momiyama, Yoichi
Author_Institution
Fujitsu Microelectron. Ltd., Tokyo, Japan
fYear
2009
fDate
11-12 June 2009
Firstpage
42
Lastpage
46
Abstract
We review the advanced technologies available for enhancing drive current of the high-density planar FETs. From the theoretical expression of the saturation current of the FET, the technologies are categorized into four groups; (1) scaling inversion gate dielectric thickness, (2) mobility enhancement, (3) steep lateral profile of the source/drain extension, and (4) reduction of parasitic resistance. Feasibility of various techniques for each group is comprehensively discussed.
Keywords
driver circuits; field effect transistors; scaling circuits; drive current enhancement; high-density transistors; mobility enhancement; parasitic resistance reduction; planar FETs; scaling inversion gate dielectric thickness; source/drain extension; CMOS technology; Dielectrics; Electric resistance; Electronic mail; Equations; FETs; MOSFETs; Microelectronics; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Junction Technology, 2009. IWJT 2009. International Workshop on
Conference_Location
Kyoto
Print_ISBN
978-1-4244-3319-3
Electronic_ISBN
978-1-4244-3320-9
Type
conf
DOI
10.1109/IWJT.2009.5166216
Filename
5166216
Link To Document