Electrical transport characterization of nano CMOS devices with ultra-thin silicon film

Author

Ghibaudo, G. ; Mouis, M. ; Pham-Nguyen, L. ; Bennamane, K. ; Pappas, I. ; Cros, A. ; Bidal, G. ; Fleury, D. ; Claverie, A. ; Benassayag, G. ; Fazzini, P.-F. ; Fenouillet-Beranger, C. ; Monfray, S. ; Boeuf, F. ; Cristoloveanu, S. ; Skotnicki, T. ; Collaert

Author_Institution

IMEP-LAHC, MINATEC/INPG, Grenoble, France

fYear

2009

fDate

11-12 June 2009

Firstpage

58

Lastpage

63

Abstract

The mobility and, more generally, the transport parameters of MOS devices are key quantities for the performance evaluation in advanced CMOS technologies. In this work, a review of the main mobility results obtained in short channel devices (here GAA/DG, FD-SOI MOSFETs and FinFETs) are presented and discussed for better understanding their transport limitations and, in turn, their performances.

Keywords

CMOS integrated circuits; MOSFET; Monte Carlo methods; carrier mobility; elemental semiconductors; nanoelectronics; silicon; silicon-on-insulator; 2D Monte Carlo collision simulation; FD-SOI; FinFET; MOS devices; MOSFET; S-D implantation process; Si; channel diffusion scattering centres; double gate transistors; drain junction; electrical transport characterization; gate length dependence; low temperature measurement; mobility; nano CMOS devices; neutral point defect; short channel devices; silicon-on-insulator; source junction; ultrathin silicon film; CMOS technology; Capacitance measurement; Doping; MOS devices; MOSFETs; Performance evaluation; Semiconductor films; Silicon; Tensile stress; Thin film transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Junction Technology, 2009. IWJT 2009. International Workshop on

Conference_Location

Kyoto

Print_ISBN

978-1-4244-3319-3

Electronic_ISBN

978-1-4244-3320-9

Type

conf

DOI

10.1109/IWJT.2009.5166220

Filename

5166220