Advanced plasma doping technique for USJ

Author

Godet, Ludovic ; Papasouliotis, George D. ; Kontos, Alex ; Miller, Timothy ; Singh, Vikram

Author_Institution

Varian Semicond. Equip. Assoc., Inc., Gloucester, MA, USA

fYear

2009

fDate

11-12 June 2009

Firstpage

86

Lastpage

90

Abstract

SDE implants were carried out in a VIISta PLAD system using both p- and n-type dopant precursors. The advanced control features in the PLAD system allowed for dopant profile control by appropriately balancing the constituent components of the plasma doping process, and retrograde dopant profiles were demonstrated for the first time using a plasma doping system. The p-doped samples were flash annealed, and fully re-crystallized. The achieved profile abruptness, and combination of sheet resistance and junction depth exceeded the ITRS requirements for the 32 nm technology node. The technique was extended to n-type USJ.

Keywords

CMOS logic circuits; doping profiles; electrical resistivity; incoherent light annealing; plasma immersion ion implantation; semiconductor doping; semiconductor junctions; USJ; advanced Logic CMOS devices; advanced plasma doping; dopant profile control; flash annealing; junction depth; n-type dopant precursors; profile abruptness; sheet resistance; source drain extension implants; ultra shallow junctions; Annealing; Application specific integrated circuits; CMOS technology; Control systems; Energy consumption; Implants; Logic devices; Plasma density; Random access memory; Semiconductor device doping;

fLanguage

English

Publisher

ieee

Conference_Titel

Junction Technology, 2009. IWJT 2009. International Workshop on

Conference_Location

Kyoto

Print_ISBN

978-1-4244-3319-3

Electronic_ISBN

978-1-4244-3320-9

Type

conf

DOI

10.1109/IWJT.2009.5166226

Filename

5166226