DocumentCode

2562203

Title

An Improved Algorithm For Minimum-area Retiming

Author

Maheshwari, Naresh ; Sapatnekar, Sachin S.

Author_Institution

Department of Electrical & Computer Engineering Iowa State University

fYear

1997

fDate

9-13 June 1997

Firstpage

2

Lastpage

7

Keywords

Clocks; Delay; Design automation; Flip-flops; Linear programming; Logic circuits; Logic gates; Permission; Timing; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1997. Proceedings of the 34th

Conference_Location

Anaheim, CA, USA

ISSN

0738-100X

Print_ISBN

0-7803-4093-0

Type

conf

DOI

10.1109/DAC.1997.597107

Filename

597107