DocumentCode
2562856
Title
Through Silicon Via stress characterization
Author
Dao, Thuy ; Triyoso, Dina H. ; Petras, Mike ; Canonico, Michael
Author_Institution
Freescale Semicond., Austin, TX, USA
fYear
2009
fDate
18-20 May 2009
Firstpage
39
Lastpage
41
Abstract
In this paper, we will present Micro Raman stress data of Through Silicon Vias (TSV) with different shapes and sizes & spacing, and discuss design considerations.
Keywords
integrated circuit design; wafer-scale integration; Micro Raman stress data; Si; Through Silicon Via stress characterization; design consideration; Capacitive sensors; Frequency; Manufacturing; Optical films; Phonons; Silicon; Strain measurement; Stress; Through-silicon vias; Tungsten;
fLanguage
English
Publisher
ieee
Conference_Titel
IC Design and Technology, 2009. ICICDT '09. IEEE International Conference on
Conference_Location
Austin, TX
Print_ISBN
978-1-4244-2933-2
Electronic_ISBN
978-1-4244-2934-9
Type
conf
DOI
10.1109/ICICDT.2009.5166260
Filename
5166260
Link To Document