Title :
IP routing table compression using ESPRESSO-MV
Author :
Bian, Jianjian ; Khatri, Sunil P.
Author_Institution :
Dept. of Electr. & Comput. Eng., Colorado Univ., Boulder, CO, USA
fDate :
28 Sept.-1 Oct. 2003
Abstract :
In an attempt to slow the exhaustion of Internet protocol (IP) address space, class-less inter-domain routing (CIDR.) was adopted. However, the decision to utilize CIDR also increases the size of the routing table, since it allows an arbitrary partitioning of the routing space. In this paper, we propose a scheme to reduce the size of routing table in the CIDR context. Our approach utilizes a well-known and highly efficient technique to perform multi-valued logic minimization. This technique, implemented using ESPRESSO-MV, is extensively used in multi-valued VLSI logic function optimization. Our approach for IP routing table compression leverages the full flexibility and power of ESPRESSO-MV. By considering the IP routing table as an incompletely specified multi-valued function, we demonstrate that our technique can achieve average 77% reduction in the size of IP routing tables. Our algorithm requires exactly one espresso run, as opposed to O(MN) runs for an existing algorithm, where M is the number of unique masks and N is the number of interfaces in the routing table.
Keywords :
Internet; VLSI; minimisation; routing protocols; transport protocols; ESPRESSO-MV; IP routing table compression; Internet protocol; classless interdomain routing; multivalued VLSI logic function optimization; multivalued logic minimization; Associative memory; CADCAM; Computer aided manufacturing; Hardware; Internet; Logic functions; Multivalued logic; Partitioning algorithms; Routing; Very large scale integration;
Conference_Titel :
Networks, 2003. ICON2003. The 11th IEEE International Conference on
Print_ISBN :
0-7803-7788-5
DOI :
10.1109/ICON.2003.1266185