Title :
Network Of Cores For Large Systems
Author :
Hany, A. ; El-Moursy, M.A. ; Fahmy, H.A.H.
Author_Institution :
Design Verification Technol. Div., Mentor Graphics Egypt, Cairo, Egypt
Abstract :
A comparison between SoC with shared bus medium and NoC using Transaction Level Modeling (TLM) is presented. The router of the NoC is implemented using SystemC. Different traffic patterns and loads are used to evaluate the implementation. Detailed performance evaluation using different metrics such as throughput, latency, number of hops and power consumption is provided. It is shown that the throughput of NoC is higher in addition to its scalability as number of cores in large systems increases. The rate of throughput increase in NoC is higher than the rate of increase of power consumption as compared to SoC as system size increases. SoC could not satisfy the continuous demands of large systems while NoC is highly scalable.
Keywords :
network routing; network-on-chip; performance evaluation; power aware computing; power consumption; NoC router; NoC throughput; SoC; SystemC; TLM; performance evaluation; power consumption; shared bus medium; transaction level modeling; Routing; System-on-chip; Cores; Network on Chip (NoC); System on Chip (SoC); Transaction Level Modeling (TLM);
Conference_Titel :
Computer Engineering & Systems (ICCES), 2014 9th International Conference on
Conference_Location :
Cairo
Print_ISBN :
978-1-4799-6593-9
DOI :
10.1109/ICCES.2014.7030961