Title :
Reducing ALU and Register File Energy by Dynamic Zero Detection
Author_Institution :
Dept. of Comput. Sci. & Eng., Univ. of South Florida, Tampa, FL
Abstract :
Register files and ALU are dominant energy consumers in the datapath of typical pipelined processors. Reducing energy consumption of these components has a big impact on processor energy budget. Consequently, several techniques have been proposed at circuit and architectural levels. In contrast, we propose a dynamic zero detection technique for reducing energy in the register files and ALU in this paper. We find that zero is the most frequent value used in the register files and ALU. When a register value is determined to be zero before reading a register file, an access to the register file is prevented to save energy and zero is directly provided to the datapath. When one of operand register values of an add instruction is zero, it is prevented from being executed on ALU since its result is just the value of the other operand register. Since adds/subs constitute most of arithmetic and logic instructions, this optimization saves large ALU energy. Our dynamic zero detection technique is demonstrated to save 9.0% and 20.2% of energy in the register files and the adder of ALU for SPEC2000 floating-point and integer benchmarks, respectively.
Keywords :
floating point arithmetic; pipeline arithmetic; ALU; SPEC2000 floating-point benchmarks; SPEC2000 integer benchmarks; dynamic zero detection; operand register; pipelined processors; processor energy budget; register file energy; Adders; Arithmetic; Circuits; Computer science; Data engineering; Energy consumption; Logic; Microarchitecture; Power engineering and energy; Registers;
Conference_Titel :
Performance, Computing, and Communications Conference, 2007. IPCCC 2007. IEEE Internationa
Conference_Location :
New Orleans, LA
Print_ISBN :
1-4244-1138-6
Electronic_ISBN :
1097-2641
DOI :
10.1109/PCCC.2007.358915