DocumentCode :
2564809
Title :
A 16 ns 1 Mb CMOS EPROM
Author :
Atsumi, S. ; Kuriyama, M. ; Imamiya, K. ; Iyama, Y. ; Matsukawa, N. ; Araki, H. ; Narita, Kazuyo ; Tanaka, Shoji
Author_Institution :
Toshiba Corp., Kawasaki, Japan
fYear :
1990
fDate :
14-16 Feb. 1990
Firstpage :
58
Lastpage :
59
Abstract :
A 64 K*16-b CMOS EPROM which achieves 16-ns access time using differential sensing with a constant-bias circuit is described. A compact test sense amplifier circuit in parallel with the main sense amplifier guarantees sufficient threshold voltage shift for the programmed cell for high-speed sensing. Complementary data are programmed into the pair of FAMOS transistors, which form one memory cell. The device is fabricated with double-layer-metal, 0.8- mu m n-well CMOS technology.<>
Keywords :
CMOS integrated circuits; EPROM; VLSI; integrated memory circuits; 1 Mbit; 16 ns; CMOS EPROM; FAMOS transistors; access time; constant-bias circuit; differential sensing; double-layer-metal; memory cell; n-well CMOS technology; test sense amplifier circuit; threshold voltage shift; CMOS technology; Circuit noise; Circuit testing; Decoding; Differential amplifiers; EPROM; Noise reduction; Programming profession; Pulse amplifiers; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 1990. Digest of Technical Papers. 37th ISSCC., 1990 IEEE International
Conference_Location :
San Francisco, CA, USA
Type :
conf
DOI :
10.1109/ISSCC.1990.110128
Filename :
110128
Link To Document :
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