Title :
Behavioral modeling in industrial IC design experiences and observations
Author :
Miller, Ira ; Ferreira-Noullet, Ana
Author_Institution :
WMSG Tempe Design Center, Freescale Semicond., Tempe, AZ, USA
Abstract :
Large systems on a chip (SoC), means more functions, gates, software, engineering, cost and IP (Roberts, 2004). This increase in the digital content, coupled with the mixing of analog functionality on a single chip, and the rush to market requirements, increases the breath of complexity for the hardware and software requirements to obtain "first pass success" development cycles. For very large SoCs, expenses are rising to such levels that potentially limit participation to a few large companies in the future. IP is an enabler to smaller development centers allowing them to partner with other smaller development centers to share expenses and expertise, to participate in market segments that would be prohibitive for each company alone. Technology to support digital only "systems on a chip (SoC)" IP is common among digital tools, but fall short for analog IP. This work presents some of the observations for analog IP in mixed signal systems development and verification.
Keywords :
hardware description languages; integrated circuit design; integrated circuit modelling; mixed analogue-digital integrated circuits; system-on-chip; VHDL-AMS; VerilogA; VerilogAMS; analog IP; analog modeling; behavioral modeling; industrial IC design; mixed signal systems development; mixed signal systems verification; systems on a chip; very large SoC; Circuit simulation; Cost function; Design engineering; Hardware design languages; Integrated circuit modeling; Integrated circuit synthesis; Power system modeling; Standards development; System-on-a-chip; Transistors;
Conference_Titel :
Behavioral Modeling and Simulation Conference, 2004. BMAS 2004. Proceedings of the 2004 IEEE International
Print_ISBN :
0-7803-8615-9
DOI :
10.1109/BMAS.2004.1393979