• DocumentCode
    2565767
  • Title

    The SystemJ approach to system-level design

  • Author

    Gruian, Flavius ; Roop, Partha ; Salcic, Zoran ; Radojevic, Ivan

  • Author_Institution
    Dept. of Comput. Sci., Lund Inst. of Technol.
  • fYear
    2006
  • fDate
    27-30 July 2006
  • Firstpage
    149
  • Lastpage
    158
  • Abstract
    In this paper, we propose a new system-level design language, called SystemJ. It extends Java with synchronous reactive features present in Esterel and asynchronous constructs suitable for modelling globally asynchronous locally synchronous systems. The strength of SystemJ comes from its ability to offer the data processing and encapsulation elegance of Java, Esterel-like reactivity and synchrony, and the asynchronous de-coupling of CSP all within the Java framework. Using standard Java environments, for specification and modelling, or specialised reactive embedded processors, for high performance implementation, the SystemJ design flow is extremely versatile. With the increasing attention that Java gets in embedded systems, SystemJ comes to address data and control, software and hardware, modelling and implementation in a unified manner
  • Keywords
    Java; hardware description languages; hardware-software codesign; Esterel; SystemJ approach; globally asynchronous locally synchronous systems; specialised reactive embedded processors; standard Java environment; system-level design language; Automatic control; Circuits; Computational modeling; Computer science; Design automation; Embedded computing; Embedded system; Formal verification; Java; System-level design;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings. Fourth ACM and IEEE International Conference on
  • Conference_Location
    Napa, CA
  • Print_ISBN
    1-4244-0421-5
  • Type

    conf

  • DOI
    10.1109/MEMCOD.2006.1695918
  • Filename
    1695918