Title :
A 5 V 7th-order elliptic analog filter for digital video applications
Author :
Gopinathan, V. ; Tsividis, Yannis ; Tan, K.-S. ; Hester, R.
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Abstract :
For high-frequency performance, seventh-order elliptic response was implemented using the GmC topology. Feedforward-feedback paths for transmission zeros were implemented by connecting capacitors between the appropriate nodes on the basis of signal flow-graph analysis. For dynamic range optimization, only integral scaling of Gm was performed using multiple transconductance amplifiers. To facilitate signal addition, each Gm block is a two-input stage, single-output-stage transconductance amplifier. Monte Carlo simulation indicates that the element matching achievable in fabrication meets specifications, provided the nominal cutoff frequency of the master is maintained by an on-chip tuning system. Simulations show that, to achieve this, it is necessary to tune both the magnitude and the phase of the filter. The master-slave approach of tuning used maintains accuracy in the presence of fabrication tolerances, temperature variations, and aging. The complete filter was implemented in a 1- mu m N-well CMOS process. The active area is 6 mm/sup 2/. The measured frequency response and the output noise spectrum are shown. To assess viability of this scheme in video antialiasing applications, 92 chips from various wafers were tested for yield, the variability of cutoff frequency, and ripple amplitude. The yield was 47%.<>
Keywords :
CMOS integrated circuits; active filters; linear integrated circuits; radiofrequency filters; tuning; video equipment; 1 micron; 5 V; GmC topology; Monte Carlo simulation; N-well CMOS process; digital video applications; dynamic range optimization; elliptic analog filter; multiple transconductance amplifiers; on-chip tuning system; seventh-order elliptic response; signal flow-graph analysis; Capacitors; Cutoff frequency; Digital filters; Fabrication; Filtering theory; Joining processes; Signal analysis; Topology; Transconductance; Tuning;
Conference_Titel :
Solid-State Circuits Conference, 1990. Digest of Technical Papers. 37th ISSCC., 1990 IEEE International
Conference_Location :
San Francisco, CA, USA
DOI :
10.1109/ISSCC.1990.110198