Title :
A Graph-based Synthesis Algorithm For AND/XOR Networks
Author :
Ye, Yibin ; Roy, Kaushik
Author_Institution :
School of Electrical and Computer Engineering, Purdue University
Keywords :
Binary decision diagrams; Boolean functions; Circuit synthesis; Computer networks; Intelligent networks; Iterative algorithms; Minimization methods; Network synthesis; Optimization methods; Programmable logic arrays;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597126
