DocumentCode
2566573
Title
An edge-oriented compaction scheme based on multiple storage quad tree
Author
Hsiao, Pei-Yung ; Feng, Wu-Shiung
Author_Institution
Inst. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear
1988
fDate
7-9 June 1988
Firstpage
2435
Abstract
As the complexity of integrated circuit design increases, the need for a computer-aided layout editing tool becomes critical. However, the most critical role in a VLSI CAD layout tool is known as the compactor. The authors describe an efficient edge-oriented, error-tolerance and mixed-constraint graph compactor based on a simple and fast region-query data structure-the multiple storage (MS) quad tree. The MS quad tree data structure supports a dexterous region search and inherently can be used to handle extended objects such as rhomboids and polygons.<>
Keywords
VLSI; circuit layout CAD; data structures; graph theory; integrated circuit technology; network topology; trees (mathematics); IC design; VLSI CAD layout; computer-aided layout editing tool; dexterous region search; edge-oriented compaction scheme; error-tolerance; integrated circuit design; mixed-constraint graph compactor; multiple storage quad tree; region-query data structure; Buildings; Compaction; Design automation; Error correction; Prototypes; Topology; Tree data structures; Tree graphs; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo, Finland
Type
conf
DOI
10.1109/ISCAS.1988.15435
Filename
15435
Link To Document