Title :
High-Speed Interconnect for a Multiprocessor Server Using Over 1Tb/s Crossbar
Author :
Yamada, J. ; Adachi, H. ; Mori, Yojiro ; Harada, Atsushi ; Okada, Shogo ; Ando, Hideki
Abstract :
A 170GB/S crossbar for a multiprocessor server is realized with 10 LSIs. High density and low power are achieved with a 1.333 Gb/s single-ended signal transmission, a driver using pre-emphasis, and a receiver using a data-synchronous scheme. The total bandwidth of the address crossbar LSI is 1.23Tb/s with 704 drivers and 352 receivers
Keywords :
large scale integration; microprocessor chips; multiprocessing systems; 1.23 Tbit/s; 1.333 Gbit/s; 170 Gbit/s; LSI; crossbar; data synchronous scheme; drivers; high-speed interconnect; multiprocessor server; receivers; single-ended signal transmission; Backplanes; Bandwidth; Clocks; Delay lines; Detectors; Feedback loop; Phase detection; Sampling methods; Transceivers; Wiring;
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
Print_ISBN :
1-4244-0079-1
DOI :
10.1109/ISSCC.2006.1696065
