Complementary GaAs JFET 16 K SRAM

Author

Vogelsang, C.H. ; Castro, J.A. ; Notthoff, J.K. ; Troeger, G.L. ; Stephens, J.S. ; Krein, R.B.

Author_Institution

McDonnell Douglas Astronaut. Co., Huntington Beach, CA, USA

fYear

1988

fDate

6-9 Nov. 1988

Firstpage

75

Lastpage

78

Abstract

A complementary GaAs JFET 16 K SRAM (static random-access memory) with a 4 K*4 organization has been designed, fabricated, and tested. Full functionality of this device has been verified with the GALPAT and marching surround-by-complement patterns. With the surround-by-complement pattern, a worst bit read access time of 22.5 ns has been measured with an average bit access time of 16.1 ns at 678-mW total power dissipation at room temperature. A wafer probe yield of 3% has been obtained.<>

Keywords

III-V semiconductors; field effect integrated circuits; gallium arsenide; integrated circuit technology; integrated memory circuits; junction gate field effect transistors; random-access storage; 16 kbit; 16.1 to 22.5 ns; 678 mW; GALPAT; GaAs; JFET; SRAM; access time; marching surround-by-complement patterns; power dissipation; room temperature; semiconductors; static random-access memory; worst bit read access time; yield 3%; Circuit testing; Extraterrestrial measurements; Gallium arsenide; JFET circuits; Logic devices; MESFETs; Power dissipation; Power measurement; Random access memory; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Gallium Arsenide Integrated Circuit (GaAs IC) Symposium, 1988. Technical Digest 1988., 10th Annual IEEE

Conference_Location

Nashville, Tennessee, USA

Type

conf

DOI

10.1109/GAAS.1988.11027

Filename

11027