Title :
Optimal two-level unequal error control codes for computer systems
Author :
Ritthongpitak, T. ; Kitakami, M. ; Fujiwara, E.
Author_Institution :
Graduate Sch. of Inf. Sci. & Eng., Tokyo Inst. of Technol., Japan
Abstract :
Error control codes are now successfully applied to computer systems, especially to memory systems. This paper proposes an extended class of unequal error control codes which protects the fixed-byte strongly in computer words from multiple errors. The fixed-byte stores valuable information such as control and address information in computer/communication messages or pointer information in database words. Here, fixed-byte means the clustered information digits in the word whose position is determined in advance. As a simple and practical class of the codes, this paper proposes an extended type of two-level unequal error control codes which has two error control levels in the codeword; one with strong error control function for the fixed-byte, and the other with weak function for the other part of the codeword. The proposed optimal codes are single-bit error correction, double-bit error detection and fixed b-bit byte error correction code, called SEC-DED-FbEC code, and single-bit plus fixed b-bit byte error correction code, called (S+Fb)EC code, which correct single-bit errors and fixed-byte errors occurring simultaneously. For both types of codes, this paper clarifies necessary and sufficient conditions and bounds on code length, and demonstrates a code construction method of the optimal codes and an evaluation of these codes from the perspectives of error correction/detection capability and decoder hardware complexity
Keywords :
error correction codes; error detection codes; fault tolerant computing; optimisation; address information; code construction method; code length; codeword; communication messages; database words; decoder hardware complexity; double-bit error detection code; fixed byte error correction code; fixed-byte; memory systems; multiple errors; optimal codes; pointer information; single-bit error correction code; single-bit plus fixed byte error correction; strong error control function; two-level unequal error control codes; weak function; Application software; Communication system control; Computer errors; Databases; Decoding; Error correction; Error correction codes; Hardware; Information science; Sufficient conditions;
Conference_Titel :
Fault Tolerant Computing, 1996., Proceedings of Annual Symposium on
Conference_Location :
Sendai
Print_ISBN :
0-8186-7262-5
DOI :
10.1109/FTCS.1996.534606