Title :
Side-channel AttacK User Reference Architecture board SAKURA-G
Author :
Guntur, H. ; Ishii, J. ; Satoh, A.
Author_Institution :
Dept. of Commun. Eng. & Inf., Univ. of Electro-Commun., Chofu, Japan
Abstract :
A new cryptographic standard FPGA board SAKURA-G equipped with a 45-nm Xilinx Spartan-6 was developed to evaluate the security of cryptographic circuits against physical attacks and to measure the hardware performance of encryption algorithms. In addition to its rich array of capabilities, improved power analysis functionality over previous standard boards SASEBO-GII and SASEBO-G is demonstrated thorough CPA (Correlation Power Analysis) on an AES circuit.
Keywords :
cryptography; field programmable gate arrays; AES circuit; CPA; SAKURA-G; SASEBO-G standard board; SASEBO-GII standard board; Xilinx Spartan-6; correlation power analysis; cryptographic circuit security; cryptographic standard FPGA board; encryption algorithms; hardware performance measurement; improved power analysis functionality; physical attacks; side-channel attack user reference architecture board; size 45 nm; Clocks; Cryptography; Field programmable gate arrays; Noise; Universal Serial Bus; FPGA board; SASEBO; cyptographic hardware; fault injection attack; side channel attack;
Conference_Titel :
Consumer Electronics (GCCE), 2014 IEEE 3rd Global Conference on
Conference_Location :
Tokyo
DOI :
10.1109/GCCE.2014.7031104
