Title :
FPGA implementation of new standard hash function Keccak
Author :
Honda, T. ; Guntur, H. ; Satoh, A.
Author_Institution :
Dept. of Commun. Eng. & Inf., Univ. of Electro-Commun., Chofu, Japan
Abstract :
High-speed hardware for Keccak, which was selected as a new standard hash function named SHA-3, was developed and its performance was evaluated against SHA-1 and -2 circuits through the use of various FPGA platforms. The results showed that Keccak is suitable for high-speed hardware implementations, but it is getting harder to implement on new FPGA devices, due to the current trends in architecture for state-of-the-art FPGAs. We also clarify the drawbacks of Keccak due to its structure.
Keywords :
cryptography; field programmable gate arrays; high-speed integrated circuits; FPGA implementation; SHA-1 circuits; SHA-2 circuits; SHA-3 hash function; cryptographic circuit; hash function Keccak; high-speed hardware implementations; Clocks; Field programmable gate arrays; Hardware; Registers; Table lookup; Throughput; Wiring; Cryptographic Circuit; FPGA implementation; Hash Function; Keccak; SHA-3;
Conference_Titel :
Consumer Electronics (GCCE), 2014 IEEE 3rd Global Conference on
Conference_Location :
Tokyo
DOI :
10.1109/GCCE.2014.7031105
