DocumentCode
2567323
Title
A 56nm CMOS 99mm2 8Gb Multi-level NAND Flash Memory with 10MB/s Program Throughput
Author
Takeuchi, Ken ; Kameda, Yusuke ; Fujimura, Shigeru ; Otake, H. ; Hosono, Keita ; Shiga, H. ; Watanabe, Yoshihiro ; Futatsuyama, T. ; Shindo, Y. ; Kojima, Masaru ; Iwai, M. ; Shirakawa, Masumi ; Hatakeyama, Kazuo ; Tanaka, Shoji ; Kamei, Toshihiro ; Fu, J.
Author_Institution
Toshiba, Yokohama
fYear
2006
fDate
6-9 Feb. 2006
Firstpage
507
Lastpage
516
Abstract
Fabricated in 56nm CMOS technology, an 8Gb multi-level NAND Flash memory occupies 98.8mm2, with a memory cell size of 0.0075mum/b. The 10MB/s programming and 93ms block copy are also realized by introducing 8kB page, noise-cancellation circuits, external page copy and the dual VDD scheme enabling efficient use of 1MB blocks
Keywords
CMOS memory circuits; NAND circuits; flash memories; 10 Mbit/s; 56 nm; 8 Gbit; CMOS technology; dual VDD scheme; external page copy; multi level NAND flash memory; noise-cancellation circuits; program throughput; Cellular phones; Circuit noise; Clocks; Digital audio players; Digital cameras; Image sensors; Motion pictures; Pixel; Throughput; Universal Serial Bus;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0079-1
Type
conf
DOI
10.1109/ISSCC.2006.1696083
Filename
1696083
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