Title :
Real-time turbo-decoding of product codes on a digital signal processor
Author :
Goalic, André ; Pyndiah, Ramesh
Author_Institution :
Telecom Bretagne, Brest, France
Abstract :
A new “block turbo code” algorithm was proposed previously for decoding product codes. A high coding rate with a high coding gain can be obtained with this code. Compared to convolutional turbo codes, the performance is comparable. To suit different applications, it is desirable to easily modify the component codes parameters. For obtaining both flexibility and adaptability, the DSP option was chosen for implementation. Using a product code based on BCH (32, 26, 4) block codes, the coding gain, for a bit error rate of 10-5, slightly exceeds 6 dB. The bit rate reaches 160 kbit/s on 20 Mips DSP decoders in a cascaded configuration
Keywords :
BCH codes; block codes; coding errors; convolutional codes; decoding; digital signal processing chips; error statistics; linear codes; 160 kbit/s; 20 MIPS; BCH block codes; DSP chip; DSP decoders; bit error rate; bit rate; block turbo code algorithm; cascaded configuration; codes parameters; coding gain; coding rate; convolutional turbo codes; digital signal processor; linear block code; product codes; real-time turbo-decoding; AWGN; Bit error rate; Bit rate; Block codes; Digital signal processing; Digital signal processors; Iterative decoding; Maximum likelihood decoding; Product codes; Turbo codes;
Conference_Titel :
Global Telecommunications Conference, 1997. GLOBECOM '97., IEEE
Conference_Location :
Phoenix, AZ
Print_ISBN :
0-7803-4198-8
DOI :
10.1109/GLOCOM.1997.638405