• DocumentCode
    2567365
  • Title

    Design of heterogeneous MPSoC on FPGA

  • Author

    Zhang, Wen-Ting ; Geng, Luo-Feng ; Zhang, Duo-li ; Du, Gao-Ming ; Gao, Ming-Lun ; Zhang, Wei ; Hou, Ning ; Tang, Yi-Hua

  • Author_Institution
    Hefei Univ. of Technol., Hefei
  • fYear
    2007
  • fDate
    22-25 Oct. 2007
  • Firstpage
    102
  • Lastpage
    105
  • Abstract
    To achieve a balance between high performance and energy efficiency, embedded systems often use heterogeneous multiprocessor platforms which tuned for a well defined application domain. Meanwhile FPGA is known for providing designers with several benefits in system design. One most important is high programmability and low risks. In this paper we demonstrate the design of an FPGA-based heterogeneous multiprocessor system integrating 4 Nios II soft cores and 1 ARM core. ARM core is the central controller of the whole system, and 4 Nios II cores are served as slaves, which are commanded by ARM core and responsible for processing regular and quantity data. ARM core and Nios II cores cooperate and work in parallel to accomplish each task. FPGA utilization of current implementation is 13% requiring 19,593 ALUTs on Altera Stratix II EP2S180.
  • Keywords
    embedded systems; field programmable gate arrays; multiprocessing systems; system-on-chip; ARM core; Altera Stratix II EP2S180; FPGA; Nios II core; embedded system; field programmable gate array; heterogeneous MPSoC; multiprocessor system-on-chip; Application software; Centralized control; Computer architecture; Control systems; Field programmable gate arrays; Hardware; Multimedia systems; Multiprocessing systems; Streaming media; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2007. ASICON '07. 7th International Conference on
  • Conference_Location
    Guilin
  • Print_ISBN
    978-1-4244-1132-0
  • Electronic_ISBN
    978-1-4244-1132-0
  • Type

    conf

  • DOI
    10.1109/ICASIC.2007.4415577
  • Filename
    4415577