DocumentCode :
2567558
Title :
A 250/spl mu/W 0.042mm2 2MS/s 9b DAC for Liquid Crystal Display Drivers
Author :
Knausz, I. ; Bowman, Robert J.
Author_Institution :
Nat. Semicond., Pittsford, NY
fYear :
2006
fDate :
6-9 Feb. 2006
Firstpage :
599
Lastpage :
608
Abstract :
The architecture and design methods are presented for implementing N-bit DACs optimized for small-format LCD column drivers. Individual 9b DACs in a 12-channel QVGA display system occupies a die area of 0.042mm 2. It represents a composite DAC performance of better than 0.60pJ/b/mm2
Keywords :
digital-analogue conversion; driver circuits; liquid crystal displays; 250 muW; DAC; QVGA display system; liquid crystal display drivers; Blanking; Decoding; Driver circuits; Liquid crystal displays; Multiplexing; Parasitic capacitance; Resistors; Switches; Switching circuits; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0079-1
Type :
conf
DOI :
10.1109/ISSCC.2006.1696097
Filename :
1696097
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2567558
بازگشت