DocumentCode :
256797
Title :
A SoC Design and Implementation of H.264 Video Encoding System Based on FPGA
Author :
Zhenni Li ; Jingjiao Li ; Yue Zhao ; Chaoqun Rong ; Ji Ma
Author_Institution :
Coll. of Inf. Sci. & Eng., Northeastern Univ., Shenyang, China
Volume :
2
fYear :
2014
fDate :
26-27 Aug. 2014
Firstpage :
321
Lastpage :
324
Abstract :
A SoC design of H.264 Video Encoding system is implemented based on FPGA in this paper. Intra prediction algorithm and baseline profile is selected, and H.264 encoder algorithm is designed as an IP core and embedded to the SoC through the interconnect interface AMBA AXI bus. The SoC is implemented on Xilinx Zynq-7000 FPGA and each functional module is simulated by Modelsim and tested within the SoC platform. Comparing to the existing H.264 Video Encoding system based on ARM or DSP, results indicate that this special SoC could fully shows its advantage in high-speed and flexibility. Also the implemented system could meet the required rate for the processing of HD-1080 format video sequence.
Keywords :
data compression; field programmable gate arrays; system-on-chip; video codecs; video coding; ARM; DSP; H.264 encoder algorithm; H.264 video encoding system; HD-1080 format video sequence; IP core; Modelsim; SoC design; SoC platform; Xilinx Zynq-7000 FPGA; baseline profile; functional module; interconnect interface AMBA AXI bus; intra prediction algorithm; Encoding; Field programmable gate arrays; IP networks; PSNR; Quantization (signal); System-on-chip; Transforms; AXI; CAVLC; H.264; SoC; Zynq;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Intelligent Human-Machine Systems and Cybernetics (IHMSC), 2014 Sixth International Conference on
Conference_Location :
Hangzhou
Print_ISBN :
978-1-4799-4956-4
Type :
conf
DOI :
10.1109/IHMSC.2014.179
Filename :
6911510
Link To Document :
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