DocumentCode
2568015
Title
A 25/spl mu/W 100kS/s 12b ADC for wireless micro-sensor applications
Author
Verma, Naveen ; Chandrakasan, Anantha P.
Author_Institution
MIT, Cambridge, MA
fYear
2006
fDate
6-9 Feb. 2006
Firstpage
822
Lastpage
831
Abstract
A 0.18mum CMOS 12b 100kS/s successive approximation ADC is presented. The entire ADC consumes 25muW from a 1V supply and achieves an SNDR of 65dB. Its sampling rate can be scaled, yielding linear power savings. Efficiency of the comparator is increased by an offset compensating latch, while noise performance and common-mode rejection are improved by a modified capacitor network
Keywords
CMOS integrated circuits; analogue-digital conversion; low-power electronics; microsensors; 0.18 micron; 1 V; 12 bit; 25 muW; analog-digital converters; common-mode rejection; linear power savings; offset compensating latch; sampling rate; successive approximation ADC; wireless microsensors; Calibration; Capacitors; Circuits; Energy resolution; Latches; Low voltage; Monitoring; Robustness; Sampling methods; Signal resolution;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location
San Francisco, CA
ISSN
0193-6530
Print_ISBN
1-4244-0079-1
Type
conf
DOI
10.1109/ISSCC.2006.1696122
Filename
1696122
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