DocumentCode
2568028
Title
SoPC-based parallel elite genetic algorithm for global path planning of an autonomous omnidirectional mobile robot
Author
Huang, Hsu-Chih ; Tsai, Ching-Chih ; Lin, Shui-Chun
Author_Institution
Dept. of Comput. Sci., Inf. Enginnering Hung Kuang Univ., Taichung, Taiwan
fYear
2009
fDate
11-14 Oct. 2009
Firstpage
1959
Lastpage
1964
Abstract
This paper presents an efficient parallel elite genetic algorithm (PEGA) for global path planning of an omnidirectional mobile robot moving in a static environment expressed by a grid-based map. This efficient PEGA, consisting of two parallel EGAs along with a migration operator, is proposed for global path planning of the mobile robots. The PEGA takes advantages of maintaining better population diversity, inhibiting premature convergence and keeping parallelism than conventional GAs do. The generated collision-free path is optimal in the sense of the shortest distance. The pipelined hardware implementation of IP (intellectual property) core library on a field-programmable gate array (FPGA) chip is employed to significantly speedup the processing time. Furthermore, a soft-core processor and a real-time operating system (RTOS) are embedded into the same chip to perform the global path planning using hardware/software co-design technique and SoPC (system-on-a-programmable-chip) concept. The merit and performance of the proposed SoPC-based PEGA are illustrated by conducting several simulations and experiments.
Keywords
field programmable gate arrays; genetic algorithms; hardware-software codesign; mobile robots; operating systems (computers); parallel algorithms; path planning; pipeline processing; system-on-chip; FPGA chip; RTOS; SoPC-based parallel elite genetic algorithm; autonomous omnidirectional mobile robot; collision-free path; field-programmable gate array; global path planning; grid-based map; hardware/software co-design technique; intellectual property core library; migration operator; pipelined hardware implementation; population diversity; premature convergence; real-time operating system; soft-core processor; system-on-a-programmable-chip; Convergence; Field programmable gate arrays; Genetic algorithms; Hardware; Intellectual property; Mobile robots; Operating systems; Path planning; Real time systems; Software libraries; Elite genetic algorithm; embedded; omnidirectional; parallel; system-on-a-programmable-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Systems, Man and Cybernetics, 2009. SMC 2009. IEEE International Conference on
Conference_Location
San Antonio, TX
ISSN
1062-922X
Print_ISBN
978-1-4244-2793-2
Electronic_ISBN
1062-922X
Type
conf
DOI
10.1109/ICSMC.2009.5346108
Filename
5346108
Link To Document