A design approach for predictable and efficient multi-core processor for avionics

This paper presents design principles of a predictable and efficient multi-core system to meet embedded computers requirements in avionics. Multi-core processors are commonplace for massive data processing and personal use. Much of such systems have a number of features whose primary purpose is to improve performance. It results in the design of a set of hardware features which are difficult to analyze for certifiable avionic hard real- time applications. Such analysis is necessary because a fault in these applications could jeopardize the flight itself. Throughout a study of various academic and industrial works, we propose an approach to manage bottlenecks to meet avionic requirements in terms of partitioning, performance and predictability (determinism).