DocumentCode :
2568297
Title :
All digital spread spectrum clock generator for EMI reduction
Author :
Damphousse, S. ; Mallinson, Mark
Author_Institution :
ESS Technol., Kelowna, BC
fYear :
2006
fDate :
6-9 Feb. 2006
Firstpage :
962
Lastpage :
971
Abstract :
An all-digital spread spectrum clock generator is presented. A digital delay matrix (DDM) is used to adjust the delay on a clock, modulating the output and producing an up or down spread. The DDM delay is no longer than one period of the clock. Measured peak clock power reduction is greater than 13dB. The circuit occupies 0.06mm2 in a 0.15mum CMOS process and consumes 7.1mW
Keywords :
clocks; delay lines; electromagnetic interference; pulse generators; 0.15 micron; 7.1 mW; CMOS process; EMI reduction; clock power reduction; digital delay matrix; spread spectrum clock generators; Calibration; Circuits; Clocks; Delay lines; Electromagnetic interference; Flip-flops; Frequency modulation; MOS devices; Multiplexing; Spread spectrum communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers. IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0193-6530
Print_ISBN :
1-4244-0079-1
Type :
conf
DOI :
10.1109/ISSCC.2006.1696138
Filename :
1696138
Link To Document :
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