DocumentCode :
2568517
Title :
A novel ESD protection circuit for ultra-deep-submicron low power mixed-signal IC designs
Author :
Yu, Ta-Lee ; Fan, Li-Hsien ; Cheng, Huijuan ; Liu, Jing ; Chen, Xianmin ; Wang, Jingjing ; Ma, Ying ; OuYang, Paul ; Guo, Annie ; Ji, Jackie ; Qin, Tim
Author_Institution :
Semicond. Manuf. Int. Corp., Shanghai
fYear :
2007
fDate :
22-25 Oct. 2007
Firstpage :
387
Lastpage :
390
Abstract :
A novel ESD protection scheme for thinner gate-oxide core devices in ultra-deep-sub-micron process will be illustrated. The novel ESD protection scheme has demonstrated significant ESD improvements for 0.13 um low power crystal oscillator buffer designs. With the new protection circuit, HBM ESD data can be improved from about 1.5 KV original to greater than 5 KV, and MM ESD data can be improved from 100 V to more than 500 V. The simulations and experimental silicon data will be presented.
Keywords :
crystal oscillators; electrostatic discharge; integrated circuit design; mixed analogue-digital integrated circuits; ESD protection circuit; HBM ESD; low power crystal oscillator buffer; thinner gate-oxide core devices; ultra-deep-submicron low power mixed-signal IC; Atherosclerosis; Breakdown voltage; CMOS process; CMOS technology; Circuits; Delay; Electrostatic discharge; Energy consumption; Protection; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
Type :
conf
DOI :
10.1109/ICASIC.2007.4415648
Filename :
4415648
Link To Document :
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