• DocumentCode
    2568551
  • Title

    Device-circuit Optimization For Minimal Energy And Power Consumption In Cmos Random Logic Networks

  • Author

    Pant, Pankaj ; De, Vivek ; Chatterjee, Abhijit

  • Author_Institution
    Georgia Institute of Technology
  • fYear
    1997
  • fDate
    9-13 June 1997
  • Firstpage
    403
  • Lastpage
    408
  • Keywords
    CMOS logic circuits; CMOS technology; Design optimization; Energy consumption; Intelligent networks; Logic design; Logic devices; MOSFETs; Power dissipation; Threshold voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1997. Proceedings of the 34th
  • Conference_Location
    Anaheim, CA, USA
  • ISSN
    0738-100X
  • Print_ISBN
    0-7803-4093-0
  • Type

    conf

  • DOI
    10.1109/DAC.1997.597181
  • Filename
    597181
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2568551