Title :
Device-circuit Optimization For Minimal Energy And Power Consumption In Cmos Random Logic Networks
Author :
Pant, Pankaj ; De, Vivek ; Chatterjee, Abhijit
Author_Institution :
Georgia Institute of Technology
Keywords :
CMOS logic circuits; CMOS technology; Design optimization; Energy consumption; Intelligent networks; Logic design; Logic devices; MOSFETs; Power dissipation; Threshold voltage;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the 34th
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-4093-0
DOI :
10.1109/DAC.1997.597181
