Title :
A low noise high linearity CMOS upconversion mixer
Author :
Jin, Liming ; Tang, Zhangwen ; Min, Hao
Author_Institution :
Fudan Univ., Shanghai
Abstract :
In this paper, a low noise high linearity mixer is presented, exploiting a switched transconductor topology. Its noise figure (NF) and linearity are analyzed particularly. The mixer chip is implemented in 0.18-mum RF CMOS process. The measurement result shows that the conversion gain of the mixer is about 8 dB, the SSB NF is about 11 dB, and the input-referred third-order intercept point (IIP3) is about 10.5 dBm. The chip consumes 10 mA at 1.8 V power supply and the size of the whole chip is 0.63 mm times 0.78 mm.
Keywords :
CMOS integrated circuits; mixers (circuits); radiofrequency integrated circuits; CMOS upconversion mixer; RF CMOS process; current 10 mA; linearity analysis; low noise high linearity mixer; noise figure analysis; size 0.18 mum; size 0.78 mm; size 6.3 mm; switched transconductor topology; voltage 1.8 V; Amplitude modulation; CMOS process; Gain measurement; Linearity; Noise figure; Noise measurement; Radio frequency; Semiconductor device measurement; Topology; Transconductors;
Conference_Titel :
ASIC, 2007. ASICON '07. 7th International Conference on
Conference_Location :
Guilin
Print_ISBN :
978-1-4244-1132-0
Electronic_ISBN :
978-1-4244-1132-0
DOI :
10.1109/ICASIC.2007.4415659
